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Meet Cyclos, a startup that cuts chip power-consumption

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When building chips, designers usually have to trade energy efficiency for performance. In general, the higher the performance, the greater the battery suck. But as smarter, more graphically intensive mobile devices land in the arms of consumers, and more data centers are requiring 100 MW or more to deliver web services, chip designers are hitting a wall. But a Berkeley, Calif.-based startup called Cyclos Semiconductor wants to help them break through the power/performance impasse.

Cyclos is a chip startup that helps both x86 and ARM(s armh) designers boost the clock speeds of their chips without boosting the wattage and sucking the battery (hat tip to the Linley Group, which mentioned this today in a newsletter). The startup was formed in 2006 out of the University of Michigan, and last month showed off the first commercial implementation of its “resonant clock mesh” semiconductor technology in AMD’s Piledriver chip. By recycling the energy inside the clock circuit on a chip it can save up to 30 percent of the entire chip’s power consumption.

A brief history of time (or the clock, actually)

Think of the clock on the processor as akin to the timing chain on a car — it governs how everything works. In the days of 1 GHz or 1.5 GHz server chips (yes, those used to be top of the line back in the early part of this century), if a chip designer were working on a high-performance chip he tended to design the CPU’s clock to function as a tree-design that relied on branches running up the chip. But as chips became faster (above 2GHz), if the branch structure was a tiny bit off, it no longer functioned properly. Kind of like if you’re driving really fast, even a tiny bump in the road can send you into a skid.

So, at more than 2Ghz, these chips were just going too fast. So the makers of server chips moved to a mesh clock design that was more fault tolerant but required a lot of wires. And more wires require more energy — the Linley Group estimates as much as 140 watts for a 3GHz or 4GHz chip.

And now, as our mobile and consumer chips hit 1.5GHz and keep going, those chip designers will no longer be able to use clock trees. However, the mesh technology that burns through 140 watts isn’t an option. Your phone would not only not keep a charge; it would burn your face or hand if you tried to use it.

Let’s get technical, technical

That market need is Cyclos’ opportunity. Basically, it has discovered a way to reduce the power consumed by the clock by between 10 and 30 percent by recycling the power sent through the clock circuit — kind of like the way¬†regenerative braking helps recover kinetic energy and turn it into electrical energy in electric cars. Or, as Linley Gwennap, of the Linley Group, said in his newsletter article on Cyclos:

In a traditional design, the clock driver and buffers burn power on every cycle. Cyclos instead generates the clock signal using a resonant LC circuit, known as a tank circuit. It creates a sine wave with a frequency determined by the inductance and capacitance of the circuit. Because the electrons flow back and forth during each oscillation, the circuit consumes little power. Because the low-power tank circuit can easily drive the entire clock mesh, this approach eliminates most of the clock buffers in a traditional design and thus much of the clock power.

What’s important here is that this startup — which counts Siemens, ARM and Hi-Tech Venture Capital as investors — has a technology currently in use in the AMD chip that could both help high performance server chips reduce their power consumption and help traditional mobile chips boost performance while not adding energy consumption. Its technology works in x86-based chips as well as ARM-based chips. I’ll leave Linley with the last word: “This trend portends a major change in high-speed processor design.”

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