The tech giant hasn’t actually built a chip with the new transistor; instead, it has demonstrated a rough circuit. IBM expects the technology to leave the lab within the next five to seven years, and assuming that happens it can actually be produced using the same processes used today.

Why we need a new transistor

The benefit to this fundamental shift is that we can continue to make smaller chips with more processing power and keep to the schedule set by Moore’s Law. That “law” dictates that we double the number of transistors on a chip every 18 months (or two years). However this doubling has pressed the chip industry to the limits — packing those transistors onto small chips is like cramming a bunch of angsty teenagers into a small space.

One might argue that Moore’s Law doesn’t matter, but the ever decreasing cost of computing power is the reason Google is able to deliver its awesome search index for the pennies people pay in search advertising, or why Facebook can spend hundreds of millions on its infrastructure and still not charge you a thing.

A big problem associated with smaller transistors (and more of them) on a chip is leakage — electrons are noisy and they lose a lot of power and heat. This new coating and the use of ions as signals reduces leakage, which means chipmakers can continue placing more of them on the chip and the cost for computing will continue going down.

And that is a good thing.

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Today you’ll only find a vacuum tube in a guitar amp or by rooting around in your grandfather’s old Hi-Fi. But vacuum tubes – or at least their underlying principles – may be set to make a resurgence. A team of researchers at the University of Pittsburgh are investigating the possibility of replacing silicon with vacuums as the medium for electron transport in an effort to build faster and more efficient electronic machines.

As Moore’s Law shrinks down the transistor to nanometer size on today’s integrated circuits, the electrons are running out of space to move around, explained principle investigator Hong Koo Kim in a Pitt news release:

The ultimate limit of transistor speed, says Kim, is determined by the “electron transit time,” or the time it takes an electron to travel from one device to the other. Electrons traveling inside a semiconductor device frequently experience collisions or scattering in the solid-state medium. Kim likens this to driving a vehicle on a bumpy road—cars cannot speed up very much. Likewise, the electron energy needed to produce faster electronics is hindered.

The best way to avoid that kind of scattering is to use no medium at all, either a “vacuum or the air in a nanometer scale space.” Kim said. “Think of it as an airplane in the sky creating an unobstructed journey to its destination,” he said.

Kim isn’t advocating a return to the old red-hot vacuum tube, rather he and his team are building on today’s silicon foundations. They’re developing a method in which electrons can be extracted from semiconductors into the air and then directed via vacuum channels over the surface of the circuit.

If the Pitt researchers can develop a commercially viable vacuum channel technology, it could mean another revolution in microelectronics, creating a new class of high-speed and low-power transistors. That would allow chipmakers to keep riding Moore’s Law and device makers to build more powerful computers, smartphones and tablets that drain less energy.

Kim’s team published their conclusions this month in the journal Nature Nanotechnology. But for a more concise – and entertaining – explanation of their efforts check out the Nation Science Foundation’s podcast on the top: Vac to the Future.

Photo courtesy of Shutterstock user SPbPhoto

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Applied Materials on Wednesday introduced a new machine that could help meet our demand for cheap, small Flash memory by reconceptualizing how chips are built. The machine will enable chipmakers to build memory chips that are constructed upwards like a multi-story building as opposed to on a flat surface. They new chips would also be a significant advancement over the 3-D transistors that Intel is building today.

Applied Materials expects the chips to be in devices the end of 2014 at the earliest — evolutions in chips take a long, long time to get to the end user. But the promise of this machine, and the subsequent ability of those that use it to build chips, is that they will be able to stack many layers of multi-cell flash memory on one chip. That’s one way to keep pushing chip architecture down the cost curve enabled by Moore’s Law.

And that means it may be possible to build terabyte or petabyte memory that can fit into a mobile phone or tablet without resorting to expensive and exotic alternatives. So today’s 64GB iPad may soon get higher-end cousins that can store even more memories and games on the tablet — if we don’t all run to the cloud with our content first.

I thought we already had 3-D chips

The chips that Applied envisions for its customers (folks that run big chip manufacturing plants such as Samsung, TSMC and even Intel) will have several layers of multicell memory on a chip — the resulting structure actually looks more like a pyramid because the stair-step design is the easiest way for the elements on the chip to connect in order to communicate between cells.

Other 3-D chips such as the Intel tri-gate transistors or even the alternative designs put forth by IBM and others, are kind of 3-D, but not fully. In their case, the transistors are layered on top of the chip and then that layer is pushed up like a wrinkle in fabric giving the transistors more surface area. But in the Applied model (which has backers at Samsung and Toshiba) the transistors are actually stacked in layers on a chip. The difference in significant in terms of how much memory you can cram onto the chip.

The Applied model is also different from other innovations in memory technology where the chips themselves are stacked, like the announcement from Intel and Micron last December on their new stacks that will enable 128 GB of storage on devices.

The road goes on forever but the cost efficiencies end.

The problem with many of these other methods is they can add more memory, but at a greater costs. In some cases, the amount of technology can lead to more manufacturing defects or chips that consume too much power or space. Applied (and some of its customers) believe that the only way to go to keep adding density without overwhelming costs (or making giant chips) is to build up.

And thus, the idea of these skyscraper chips, which Brad Howard, head of advanced technology, etch business unit with Applied, says are coming. He noted that right now an undisclosed number of its customers are testing the new Centura Avatar machine in pilot lines in their chip plants and thinks that roughly around the time when we try to jam a terabyte of memory into a cell-phone-sized package, it will become more cost effective to build up in layers as opposed to stacking chips or adding wrinkles to our flash chips. If he’s right, then the skyscraper era will begin.

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So, as part of the launch of 13 chips (part of the Ivy Bridge line) Intel’s PC business chief, Kirk Skaugen, is showing off this new way to manufacture chips that was 11 years in the making. Intel isn’t the only firm out there to keep pushing the boundaries of performance on chips without sacrificing power, but it’s the first out of the gate by putting its 3-D transistors into production. Startup SuVolta, and an industry consortium pushing a different type of 3-D transistor are also working to giver devices more performance and a longer battery life.

Intel plans to incorporate 14nm transistors by 2013 and 10nm by 2015. So as Intel’s race with ARM-based chipmakers in the mobile space heats up, it’s not lying down. It is both boosting the manufacturing chops it needs to keep up with performance and power demands and continuing to create chips for a wide variety of products ranging from servers to mobile phones. As the computing worlds gets more heterogeneous, Intel’s trying to capitalize on the skills it learned building chips designed for the x86 ecosystem and taking the x86 cores as far as they will go. Who knows if it will be far enough, but the deep research required here is pretty impressive.

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Chips made using its technique have recently run at full speed but consumed half the power of their counterparts that use traditional transistors. This isn’t just a concern of a crazy startup; Intel recently unveiled a new process technology using 3-D transistors that is designed to save on power by helping chips continue to get smaller.

However, SuVolta’s process is pretty sweet because it uses the existing manufacturing tools already in place at the multi-billion semiconductor manufacturing plants, and because it should continue to work as designers shrink their chips. SuVolta also licenses some IP that gives designers a way to tweak their circuits to optimize the efficacy of the power-saving transistors.

It’s also designed to work best for systems on a chip, which are clusters of different processors integrated on one piece of silicon. In PCs and servers, a single or multi-core CPU was the ideal design choice, but for mobile devices and consumer products, integrating a bunch of different types of cores on a single chip has won out because it saves on space and power. This is why I listed SuVolta one of the three startups that showcase the future of chips.

And saving on space and power is the name of the game as devices go mobile and energy becomes a huge issue, either because of battery life or because power generation has become such a limiting factor in the data center. In fact, many of the chip companies that have managed to raise money in the last two or three years are working to reduce power either through some new process or through using new architectures to perform work more efficiently. Companies such as Adapteva, which is using a different architecture to deliver performance with less power in supercomputers and phones; Calxeda, which is trying to use ARM-based chips for low-power servers; and Lyric Semiconductor, which is focused on a new type of computing, all have raised money in the last few years.

But to show how rare such capital-intensive chip deals are, SuVolta pulled together this infographic to drive it home. As a chip reporter who once covered the bubble years when chip startups were a dime a dozen, I live this shrinkage, because there are fewer pitches and fun stories to write, but this makes it easy for everyone to see what’s going on.

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Lowering the power consumption of chips has become a rallying call for the chip industry. SuVolta is also doing its bit so that battery-powered mobile devices will last longer and server makers can deliver computing without requiring data centers to have their own power plants — a theoretical future that could grind the current wave of web services and cloud computing innovations to a halt. The startup has the backing of several A-listers in the chip world, such as Andy Bechtolsheim, Wilfred Corrigan (the founder of LSI Logic) and Bill Joy (Sun Microsystems co-founder, now with Kleiner Perkins, Caufield & Byers).

SuVolta was founded in  2006, and it raised $36.5 million in three rounds through 2009 from investors, including angels such as Bechtolsheim and Corrigan and venture firms including Kleiner Perkins and others. But it ran into stormy weather  — a situation not uncommon in the chip industry. So it was recapitalized in 2010 with $22 million from NEA, August Capital and Kleiner Perkins after getting new management.

The new executive team is headed by McWilliams, who has worked at Tessera and Flextronics, and Scott Thompson as the CTO. Thompson was an Intel fellow who worked on many types of process technologies, both to lower the power consumption in chips but also to continue shrinking them and cramming more transistors on them. We recently covered Intel’s new type of 3-D transistor it announced with much fanfare in May.

SuVolta’s tech, however, is less revolutionary than changing the design of the transistor. At an early point in the manufacturing process (it won’t disclose the point), the SuVolta technology calls for a slightly different combination of ingredients to be layered on the chip. Semiconductors are manufactured in a manner similar to layer cakes, with each layer of circuitry deposited on the chip and the unnecessary bits etched away according to whatever pattern the manufacturer is supposed to follow. Thompson says that SuVolta’s process, which will be available next year, doesn’t change the overall chip-making process. It doesn’t change the silicon used to make the chip, and it can be easily implemented in fabrication plants that will license SuVolta’s technology.

That’s not all. The company says that in addition to the modifications to the manufacturing process, it has developed new circuit design elements that will boost the efficiency even more. McWilliams plans on selling licenses much like ARM does to chip makers, although this tweak doesn’t change the instruction set (so an x86-based chip from Intel or AMD will still operate as an x86 chip, while a chip based on the ARM architecture is still able to run software for those chips).

Unlike building a new chip and finding buyers for it, SuVolta has to convince chip foundries such as Taiwan Semiconductor Manufacturing Company; chip makers such as Qualcomm and Broadcom; and even chip equipment makers such as Applied Materials to embrace its new technology. Fujitsu Semiconductor has signed on as the first licensee. Let’s hope there will be others — for the sake of our power-hungry smartphones.

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Six decades later, the computer business is facing a brand new set of challenges. Moore’s Law as we have known it is facing a ceiling, argues Associated Press.

Gordon Moore, the Intel Corp. co-founder who famously predicted in 1965 that the number of transistors on a chip should double every two years, sees that the end is fast approaching — an outcome the chip industry is scrambling to avoid. “I can see (it lasting) another decade or so,” he said of the axiom now known as Moore’s Law. “Beyond that, things look tough. But that’s been the case many times in the past.”

The ever smaller and always faster chips are beginning to run into physical limits, including the problems created by generating too much heat, and excessive power consumption. This has the industry scrambling for new technologies and radical new thinking.

Intel for instance is experimenting with different ways to keep it going, indulging in highly speculative technologies that include everything from optics to quantum computing. Others like Microsoft’s Craig Mundie are talking about multiple core chips, where each core is assigned a specific task. He compares them the future multi core chips to orchestras. The only problem, as The New York Times points out is the software that makes these chips do what they are supposed to ultimately do.

And while we wait for these big ideas come to fruition, the real future means packing these transistors tighter and closer in ways previously not thought, and ultimately putting them into mobile phones — the real computers of the future. Moore’s Law has always been equated with PCs.

The PC centric approach overshadows the fact PC represents the past of our industry, the future is mobile — not just mobile phones but a whole gaggle of mobile devices that haven’t been dreamed off yet.
In my Business 2.0 column, Moore’s Law 2.0, I quoted Drew Lanza, general partner with Morgenthaler Ventures, who pointed out that “Moore’s original research paper didn’t say anything about processor clock speed. It said you could, with every generation of chips, cram more transistors into the same space.”

As phone makers cram more features into cell phones – FM radios, TV tuners, Wi-Max, and ultra-wideband – chip designers will have to pack them intelligently into ever smaller circuits. Moore’s Law in the 21st century is about building these supercombo chips, not the fastest chip for your desktop. With nearly 1 billion mobile phones sold every year, this is an opportunity much larger than the PC market.

Here is to next 60 years!

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