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Summary:

Texas Instruments will join the slew of chipmakers using cell-phone cores in servers. But it has two twists with its KeyStone architecture — integrated 10 gigabit Ethernet networking and TI’s digital signal processing cores to aid in performing complex math.

Texas Instruments, the company behind the Speak & Spell and the application processor in the Kindle, is joining the ARM-based server crush with a series of processor cores that will use the ARM IP from its cell phone business as well as its own digital signal processing chips to deliver high performance computing power to the data center. What’s most interesting about its foray into the data center market is that its cores also come with networking integrated onto the chip. The server chips are part of a series of chips that TI is calling its KeyStone multicore architecture.

This means that not only is TI confident that there’s a market for a new type of high performance computing chip (as well as one for webscale and cloud providers), but that TI thinks that integrating up to five 10-Gigabit Ethernet ports on that chip will make it more ideal for the new demands on data centers. As Tom Flanagan, the director of multicore strategy at TI said, the integration of 10-Gigabit Ethernet on the system on a chip means that the top-of-rack switch could be rendered moot.

Others are also thinking about the future of the top-of-rack chip, especially in scale-out data centers where traffic doesn’t stay confined to a rack but needs to communicate with servers in racks across mammoth data centers. For example, Frank Frankovsky of Facebook has said he’s trying to think outside that architecture. Facebook has also stepped up to support the developing ARM-based server ecosystem, appearing onstage as AMD said it would license the ARM core for server chips and joining an industry group aimed at building software for ARM servers.

The KeyStone purpose-built server architecture.

The integration of networking onto a single die (or chip) is an architecture that Intel talked up at its developer conference in September, but it plans to integrate 100 gigabit networking on the chip and it plans to do this by some unspecified future time. Texas Instruments says it is sampling its KeyStone architecture-based chips and they will be ready for servers by next year. Unlike some of the recent announcements from ARM partners in the server arena, TI plans to use the existing 32-bit ARM A15 processor cores married to its math-oriented digital signal processing chips, as opposed to the next generation A-50 cores that support 64-bit computing, but won’t be ready for servers until late in 2013 or early 2014.

Servers aren’t the only area where TI is trying out the ARM+DSP combo. It plans to use them for sensor-based chips as well as in normal networking equipment — both industries where TI has a long history. I have no idea if Texas Instruments can make DSP chips inside servers happen (the company has been talking this up since 2009) but the marriage of DSP and ARM, as well as integrated networking seems to offer a powerful product for real-time data analysis where you want to move and process a lot of information in parallel quickly.

  1. Guess using DSP is not all that different from integrating a GPU and more specialized computing units are very likely going forward.
    As for going with A15, it’s all about the timeline,now we have A9 based chips,A15 comes next and A50 is the first one that really matters.

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  2. Based on my experience with their heterogeneous multicore Cortex-A8 + C64x Davinci chips I don’t see this proprietary architecture that’s more of a anachronistic philosophical virus inside of TI becoming successful in the general purpose server market. Also, hitching their boat to a 32-bit ARM core when it comes to the server space is pretty silly,

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